Kniha High-Performance Computing on the Intel (R) Xeon Phi (TM) Endong Wang

High-Performance Computing on the Intel (R) Xeon Phi (TM)

How to Fully Exploit MIC Architectures

Jazyk: Angličtina
Väzba: Pevná
Dostupnosť: Skladom u dodávateľa
Odosielame za 10-13 dní
48.99
The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the...

Informácie o knihe

Jazyk
Angličtina
Väzba
Kniha - Pevná
Vydalo
2014
Stránok
338
EAN
9783319064857
ISBN
3319064851
Enbook ID
02581572
Hmotnosť
708
Rozmery
166 x 243 x 24

Kompletný popis

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms, and also offers tips and tricks for actual use, based on the authors first-hand optimization experience. §The material is organized in three sections. The first section, Basics of MIC , introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on Performance Optimization explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, Project development presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC. §This book appeals to two main audiences: First, software developers for HPC applications it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology, and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing it will guide them on how to push the limits of system performance for HPC applications. §

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