Digital System Test and Testable Design

Name: Digital System Test and Testable Design
Brand: Springer-Verlag New York Inc.
SKU: 9781441975478
Price: 115.7 EUR
Availability: InStock

Autor: Zainalabedin Navabi

Jazyk:

Väzba: Pevná

Vydavateľ: Springer-Verlag New York Inc.

Dostupnosť: Skladom u dodávateľa v malom množstve

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115.70 €

This book is about digital system testing and testable design. The concepts of testing and testabili...

Informácie o knihe

Autor

Zainalabedin Navabi

Jazyk

Angličtina

Väzba

Kniha - Pevná

Vydalo

2010

Stránok

435

EAN

9781441975478

ISBN

1441975470

Enbook ID

01424239

Vydavateľ

Springer-Verlag New York Inc.

Hmotnosť

2230

Rozmery

178 x 254 x 35

Kompletný popis

This book is about digital system testing and testable design. The concepts of testing and testability are treated together with digital design practices and methodologies. The book uses Verilog models and testbenches for implementing and explaining fault simulation and test generation algorithms.§Extensive use of Verilog and Verilog PLI for test applications is what distinguishes this book from other test and testability books. Verilog eliminates ambiguities in test algorithms and BIST and DFT hardware architectures, and it clearly describes the architecture of the testability hardware and its test sessions. Describing many of the on-chip decompression algorithms in Verilog helps to evaluate these algorithms in terms of hardware overhead and timing, and thus feasibility of using them for System-on-Chip designs. Extensive use of testbenches and testbench development techniques is another unique feature of this book. Using PLI in developing testbenches and virtual testers provides a powerful programming tool, interfaced with hardware described in Verilog. This mixed hardware/software environment facilitates description of complex test programs and test strategies.

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