Kniha Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs Brandon Noia

Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Jazyk: Angličtina
Väzba: Pevná
Dostupnosť: Skladom u dodávateľa
Odosielame za 10-13 dní
97.46
This book describes innovative techniques to address the testing needs of 3D stacked integrated circ...

Informácie o knihe

Jazyk
Angličtina
Väzba
Kniha - Pevná
Vydalo
2013
Stránok
245
EAN
9783319023779
ISBN
3319023772
Enbook ID
02076816
Hmotnosť
514
Rozmery
157 x 243 x 16

Kompletný popis

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain. Coverage includes topics ranging from die-level wrappers, self-test circuits, and TSV probing to test-architecture design, test scheduling, and optimization. Readers will benefit from an in-depth look at test-technology solutions that are needed to make 3D ICs a reality and commercially viable.

Mohlo by vás zaujímať

15.55

Deluxe

Dana Thomas
14.38

Darren Waterston

Susan Cross
32.97
31.79

Computing Dendrite

Benjamin Torben-Nielsen
149.32

Zákazníci, ktorí si kúpili túto knihu, kúpili tiež

Blatter Fur Technikgeschichte

Dr. Phil. Josef Nagler
51.86
10.56